Overview
Ellips Rio
High Performance Frame Grabber:
Designed to get the most out of any S-Video/composite colour or
standard black and white camera, the Ellips Rio is a high
performance PCI frame grabber, targeted at real-time industrial
image processing applications.
The Rio comes in two versions:
- Basic
version with one input module
- Full
version with two input modules
The
Basic Rio features:
- 3rd
generation PCI bus master with flexible transfer controller
- 6 (CVBS
or monochrome) cameras or 3 Y/C cameras can be connected
- Black
& white (grayscale) digitizing
- Colour
digitizing, inputs Y/C or CVBS
- Simultaneous
grabbing from two black and white cameras
- Supports
progressive scan cameras
The
extra Full Rio features are:
- Independent
processing of two video sources
- Fast
switching between colour cameras
- Simultaneous
grabbing from four black and white cameras
- High
quality black and white input with programmable gain and
offset
- Supports
RGB and RGBA cameras
Features
3rd generation PCI bus master with flexible transfer
controller
Several PCI grabbers have been available on the market for some
time, but, depending on their architecture, most of them are not
suited for real-time imaging processing applications:
The Ellips
Rio offers PCI bus master DMA, allowing burst
transfers of up to 132MB/s (depending on the quality of the
main board) without tying up the main CPU, combined with a very
flexible transfer controller. Using a Register Program
Sequencer, input window, output destination, scaling, and
clipping can be reprogrammed on a line-by-line basis without CPU
intervention. The sequencer program can be changed every field
to incorporate complex changes of the image parts transferred
over the PCI bus to main memory, thus tracking moving objects.
The PCI
interface supports virtual memory addressing for operating
systems running virtual demand paging (like Windows). The
integrated Memory Management Unit (MMU) translates linear to
physical addresses using a page table in system memory provided
by the software driver. The MMU supports op to 4 Mbytes of
virtual address space per DMA channel.
6
(CVBS or monochrome) cameras or 3 Y/C cameras can be connected
Up to 6 CVBS or monochrome cameras or 3 Y/C cameras can be
connected to a Rio board. Also CVBS or monochrome connections in
combination with Y/C connections are allowed. Of course every
Y/C camera needs to be connected to Y and C connectors on the
Rio that belong together.
Black & white (grayscale) digitizing
Black and white camera standards CCIR (50 fields per second) and
EIA (60 fields per second) are supported. Different output
formats are possible (grayscale, binary).
Colour digitizing, inputs Y/C or CVBS
The NTSC (60 fields per second), PAL and SECAM (50 fields per
second) colour standards are supported. A wide variety of output
formats is supported.
Simultaneous grabbing from two black and white cameras
Although the basic version of the Rio only has one input module,
it still is capable of simultaneous grabbing at 50 (CCIR) or 60
(EIA) fields per second with two genlocked monochrome cameras
(stereo locked mode). However to obtain conventional output
formats, postprocessing is needed, which will have an impact on
the capture rate.
Supports progressive scan cameras
The Rio can be used to digitize from a progressive scan camera
at 50 (CCIR) or 60 (EIA) frames per second, e.g. JAI CV-M10).
Full frame camera input is supported for the Full Rio as well as
for the Basic Rio. For the Basic Rio however postprocessing is
needed to obtain conventional output formats. Additionally the
Full Rio can also adjust brightness and contrast in full frame
mode, or the Full Rio can be used to digitize from two
progressive scan cameras simultaneously.
Independent
processing of two video sources
Because the full version of the Rio also has two DMA
channels, two colour cameras each can be handled totally
separately, so it is possible for example for one input module
to be connected to a colour camera and one input module to a
monochrome camera. Also simultaneous grabbing from two colour
cameras is possible with the Full Rio.
Fast
switching between colour cameras
For many image processing applications evaluating
outputs from multiple cameras is desirable. When allowable with
respect to speed constraints, hardware costs can be reduced by
fast switching between multiple cameras on a field by field
basis, using a single frame grabber.
With
traditional grabbers, fast switching between colour cameras
demands colour carrier sub-locking in addition to a conventional
genlock. This often involves modifying camera electronics, thus
increasing costs.
The full
version of our Ellips Rio frame grabber is capable of
fast switching between two colour cameras without colour carrier
sub-locking, because each of the two cameras can be connected to
its own input module. In this mode, a field rate of 25 fields
(PAL; 30 in NTSC) per second per camera can be achieved. When no
RGB output is required, this mode can even be used at 50 (PAL/SECAM)
or 60 (NTSC) fields per second per camera.
Simultaneous
grabbing from four black and white cameras
With the Full Rio, because it has two input modules,
both modules can be used in stereo locked mode, making
simultaneous grabbing at 50 (CCIR) or 60 (EIA) fields per second
with four genlocked monochrome cameras possible. However to
obtain conventional output formats, postprocessing is needed,
which will have an impact on the capture rate.
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High quality black and white input with
programmable gain and offset
For high
quality black and white measurements, the full version of the
Rio has a separate converter stage with programmable gain and
offset. Its input can be switched at field rate between
genlocked cameras. In contrast to the other modules (which
only have an output range of 192 values, which will result in
missing values when mapped to a 256 value scale), the high
quality black and white module has a full output range of 256
values. Therefore for serious black and white measurements,
the full version of the Rio is recommended.
Supports RGB and RGBA cameras
With the Full Rio, one RGB(A) camera can be connected.
Post-processing is needed to obtain one of the output formats
that are supported (including planar output).
Architectural
Overview
On
a Basic Rio, only input module 0 is available without the High
Quality Black & White functionality.
Connected
to the input modules are the two scalers; the High
Performance Scaler (HPS) that consists of three parts (downscaler,
color space converter and pixel formatter) and the more
basic Binary Ratio Scaler. Each input module can be
connected to either scaler.
The
scalers are connected to the DMA control (two DMA channels),
which on its turn is connected to the PCI local
bus.
Specifications
Host Computer Interface
- High
speed DMA burst transfer (up to 132MB/s)
- Programmable
transfer controller
- Support
for multiple boards in one system
Acquisition
- RS-170,
CCIR, NTSC, PAL, SECAM, Y/C or monochrome inputs
- Resolutions:
any size up to:
- PAL,
SECAM, CCIR native: 768x576
- NTSC,
EIA native: 640x480
- Output
formats:
- RGB32
(aRGB)
- RGB24
(RGBR...)
- RGB16
(5:6:5)
- RGB15
(a:5:5:5 or 5:5:a:5)
- RGB8
(3:3:2)
- YUV16
(CCIR)
- Y8
(256 grayscale)
- Y2
(2 bit grayscale)
- Y1
(B/W)
Compensation
of Gamma Pre-Correction is supported on RGB modes.
-
Sample
rate: 14.75 / 7.38 MHz for PAL / SECAM; 12.27 / 6.13 MHz for
NTSC.
-
Digital
PLL provides stable synchronization even when using still
video cameras and VCRs
-
Support
for any combination of up to three Y/C video sources and
six composite or monochrome video sources
-
6 SMB
connectors for six monochrome, CVBS, three Y/C pairs
(S-Video) or one RGB(A) camera.
- Portable
operating system independent C library.
- Supported
platforms:
- Dos
(32-bit) (including full source code):
- Watcom
C/C++ (11.0) + Pharlap TNT DOS-extender
- Windows
9x/NT/2000/XP (32-bit):
- Microsoft
Visual C 4.x / 5.x / 6.x
- Microsoft Visual Basic 6
- VxD/device driver and
DLL for C-library and Visual Basic
- Real-time
operating system VxWorks
- WindRiver
Tornado 2.x
- Capture
and sample applications for DOS and Windows.
- Support
for Image-Pro
Plus.(development tool)
- 3rd
party support by ILIB.
Specifications
subject to change without notice.
For
more information, feel free to contact Ellips.
Sidebar:
PCI Bus Issues
Burst transfers
To understand PCI transfer rates, some background information on
the PCI bus protocol may come in handy. A PCI bus can be
populated by several masters (or initiators) and targets.
Ownership of the bus is arbitrated between masters. A master
that owns the bus can transfer data to and from targets.
PCI
bus transfers occur in bursts: an address exchange followed by
one or more data exchanges. The more data is exchanged after a
single address, the higher the transfer rate. The following
table lists PCI bus efficiency versus burst length (for single
clock cycle arbitration latency and two clock cycle target
latency, using a PCI clock frequency of 33 MHz):
| Burst
Size/transfer |
Maximum
Available Bandwidth |
PCI
Bus Efficiency |
1
Dword
(4 bytes) |
33
MB/s |
25
% |
2
Dwords
(8 bytes) |
53
MB/s |
40
% |
4
Dwords
(16 bytes) |
75
MB/s |
57
% |
8
Dwords
(32 bytes) |
96
MB/s |
73
% |
16
Dwords
(64 bytes) |
111
MB/s |
84
% |
32
Dwords
(128 bytes) |
121
MB/s |
91
% |
64
Dwords
(256 bytes) |
126
MB/s |
96
% |
As arbitration latency and target latency increase, bandwidth
and efficiency decrease, especially with small bursts.
Bus master DMA
Transfers can be carried out either by the main CPU, or by the
PCI board, acting as bus master DMA controller. The former is
more simple for PCI hardware developers, since they only have
to implement a PCI target interface, which is freely available
for the users of most types of FPGAs. A target-only
implementation, however, ties down the CPU during transfers. A
better alternative is a bus master DMA controller, allowing
the CPU to continue program execution.
FIFO instead of frame memory
Given the fact that nowadays most PCI main board
chipsets support transfer rates of at least 65 MB/s, on-board
frame memory is unnecessary. A small FIFO can accomodate for
bus latency. Using a FIFO instead of frame memory decreases
image latency and hardware costs. The danger of FIFO overruns
can be eliminated by transfering only the parts of the image
actually needed, using a flexible transfer controller.
Real-time response
Due to the nature of burst transfers, access to the
PCI bus becomes available within a guaranteed, small, time
frame. This ensures that access to a new frame is available
before the FIFO is completely filled. It also ensures that
during image transfer the bus is freed periodically to allow
access to memory or e.g. a host bus adapter. Bus arbitration
ensures a fair time slot allocation, making the bus suitable
for real-time applications.
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